? semiconductor components industries, llc, 2008 august, 2008 ? rev. 6 1 publication order number: nup4201dr2/d nup4201dr2 low capacitance surface mount tvs for high-speed data interfaces the nup4201dr2 transient voltage suppressor is designed to protect equipment attached to high speed communication lines from esd, eft, and lightning. features ? so ? 8 package ? peak power ? 500 watts 8 x 20 s ? esd rating: iec 61000 ? 4 ? 2 (esd) 15 kv (air) 8 kv (contact) iec 61000 ? 4 ? 4 (eft) 40 a (5/50 ns) iec 61000 ? 4 ? 5 (lightning) 25 a (8/20 s) ? ul flammability rating of 94 v ? 0 ? pb ? free package is available typical applications ? high speed communication line protection ? usb power and data line protection ? video line protection ? base stations ? hdsl, idsl secondary ic side protection ? microcontroller input protection maximum ratings rating symbol value unit peak power dissipation 8 x 20 s @ t a = 25 c (note 1) p pk 500 w junction and storage temperature range t j , t stg ? 55 to +150 c lead solder temperature ? maximum 10 seconds duration t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. non ? repetitive current pulse 8 x 20 s exponential decay waveform so ? 8 low capacitance voltage suppressor 500 watts peak power 6 volts pin configuration and schematic http://onsemi.com i/o 1 1 ref 1 2 ref 1 3 i/o 2 4 8 ref 2 7 i/o 4 6 i/o 3 5 ref 2 marking diagram soic ? 8 case 751 plastic ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. 1 8 p4201 ayww 1 8 p4201 = device code a = assembly location y = year ww = work week = pb ? free package (note: microdot may be in either location) device package ordering information shipping ? nup4201dr2 so ? 8 2500/tape & reel NUP4201DR2G so ? 8 (pb ? free) 2500/tape & reel
nup4201dr2 http://onsemi.com 2 electrical characteristics characteristic symbol min typ max unit reverse breakdown voltage @ i t = 1.0 ma v br 6.0 ? ? v reverse leakage current @ v rwm = 5.0 volts i r n/a ? 10 a maximum clamping voltage @ i pp = 1.0 a, 8 x 20 s v c n/a ? 9.8 v maximum clamping voltage @ i pp = 10 a, 8 x 20 s v c n/a ? 12 v maximum clamping voltage @ i pp = 25 a, 8 x 20 s v c n/a ? 25 v between i/o pins and ground @ dc bias = 0 v, 1.0 mhz capacitance ? 5.0 10 pf between i/o pins and i/o @ dc bias = 0 v, 1.0 mhz capacitance ? 2.5 5.0 pf electrical characteristics (t a = 25 c unless otherwise noted) unidirectional (circuit tied to pins 1 and 3 or 2 and 3) symbol parameter i pp maximum reverse peak pulse current v c clamping voltage @ i pp v rwm working peak reverse voltage i r maximum reverse leakage current @ v rwm v br breakdown voltage @ i t i t test current v br maximum temperature coefficient of v br i f forward current v f forward voltage @ i f z zt maximum zener impedance @ i zt i zk reverse current z zk maximum zener impedance @ i zk uni ? directional tvs i pp i f v i i r i t v rwm v c v br v f
nup4201dr2 http://onsemi.com 3 typical characteristics ? 100 0 9 figure 1. reverse breakdown versus temperature ? 50 t, temperature ( c) 100 200 4 1 0 figure 2. reverse leakage versus temperature v z , reverse breakdown (v) 8 7 6 5 4 3 2 1 0 ? 100 ? 50 50 100 t, temperature ( c) 200 50 150 2 3 8 5 6 7 0 150 i r , reverse leakage ( a) figure 3. 8 x 20 s pulse waveform 100 90 80 70 60 50 40 30 20 10 0 0204060 t, time ( s) % of peak pulse current t p t r pulse width (t p ) is defined as that point where the peak current decay = 8 s peak value i rsm @ 8 s half value i rsm /2 @ 20 s 80 figure 4. clamping voltage versus peak pulse current 35 30 25 20 15 10 5 0 0204060 i pp , peak pulse current (a) 80 v c , clamping voltage (v) 10 30 50 70 90
nup4201dr2 http://onsemi.com 4 applications information the new nup4201dr2 is a low capacitance tvs diode array designed to protect sensitive electronics such as communications systems, computers, and computer peripherals against damage due to esd events or transient overvoltage voltage conditions. because of its low capacitance, it can be used in high speed i/o data lines. the integrated design of the nup4201dr2 offers surge rated, low capacitance steering diodes and a tvs diode integrated in a single package (so ? 8). if a transient condition occurs, the steering diodes will drive the transient to the positive rail of the power supply or to ground. the tvs device protects the power line against overvoltage conditions to avoid damage to the power supply and any downstream components. nup4201dr2 configuration options the nup4201dr2 is able to protect up to four data lines against transient overvoltage conditions by driving them to a fixed reference point for clamping purposes. the steering diodes will be forward biased whenever the voltage on the protected line exceeds the reference voltage (vcc+vf). the diodes will force the transient current to bypass the sensitive circuit. data lines are connected at pins 1, 4, 6 and 7. the negative reference is connected at pins 5 and 8. these pins must be connected directly to ground by using a ground plane to minimize the pcb?s ground inductance. it is very important to reduce the pcb trace lengths as much as possible to minimize parasitic inductances. option 1 protection of four data lines and the power supply using vcc as reference. 8 7 6 5 1 2 3 4 i/o 1 i/o 2 i/o 3 i/o 4 v cc figure 5. for this configuration, connect pins 2 and 3 directly to the positive supply rail (vcc), the data lines are referenced to the supply voltage. the internal tvs diode prevents overvoltage on the supply rail. biasing of the steering diodes reduces their capacitance. option 2 protection of four data lines with bias and power supply isolation resistor. 8 7 6 5 1 2 3 4 i/o 1 i/o 2 i/o 3 i/o 4 v cc 10 k figure 6. the nup4201dr2 can be isolated from the power supply by connecting a series resistor between pins 2 and 3 and vcc. a 10 k resistor is recommended for this application. this will maintain a bias on the internal tvs and steering diodes, reducing their capacitance. option 3 protection of four data lines using the internal tvs diode as reference. 8 7 6 5 1 2 3 4 i/o 1 i/o 2 i/o 3 i/o 4 nc nc figure 7. in applications lacking a positive supply reference or those cases in which a fully isolated power supply is required, the internal tvs can be used as the reference. for these applications, pins 2 and 3 are not connected. in this configuration, the steering diodes will conduct whenever the voltage on the protected line exceeds the working voltage of the tvs plus one diode drop (vc=vf + v tvs ). esd protection of power supply lines when using diodes for data line protection, referencing to a supply rail provides advantages. biasing the diodes reduces their capacitance and minimizes signal distortion. implementing this topology with discrete devices does have disadvantages. this configuration is shown below:
nup4201dr2 http://onsemi.com 5 v cc d1 d2 data line i esdpos i esdneg vf + v cc ? vf i esdpos i esdneg power supply protected device figure 8. looking at the figure above, it can be seen that when a positive esd condition occurs, diode d1 will be forward biased while diode d2 will be forward biased when a negative esd condition occurs. for slower transient conditions, this system may be approximated as follows: for positive pulse conditions: vc = vcc + vf d1 for negative pulse conditions: vc = ? vf d2 esd events can have rise times on the order of some number of nanoseconds. under these conditions, the effect of parasitic inductance must be considered. a pictorial representation of this is shown below. v cc d1 d2 data line i esdpos i esdneg v c = v cc + vf + (l diesd/dt) i esdpos i esdneg power supply protected device v c = ? vf ? (l diesd/dt) figure 9. an approximation of the clamping voltage for these fast transients would be: for positive pulse conditions: vc = vcc + vf + (l di esd /dt) for negative pulse conditions: vc = ? vf ? (l di esd /dt) as shown in the formulas, the clamping voltage (vc) not only depends on the vf of the steering diodes but also on the l di esd /dt factor. a relatively small trace inductance can result in hundreds of volts appearing on the supply rail. this endangers both the power supply and anything attached to that rail. this highlights the importance of good board layout. taking care to minimize the effects of parasitic inductance will provide significant benefits in transient immunity. even with good board layout, some disadvantages are still present when discrete diodes are used to suppress esd events across datalines and the supply rail. discrete diodes with good transient power capability will have larger die and therefore higher capacitance. this capacitance becomes problematic as transmission frequencies increase. re ducing capacitance generally requires reducing die size. these small die will have higher forward voltage characteristics at typical esd transient current levels. this voltage combined with the smaller die can result in device failure. the on semiconductor nup4201dr2 was developed to overcome the disadvantages encountered when using discrete diodes for esd protection. this device integrates a tvs diode within a network of steering diodes. d1 d2 d3 d4 d5 d6 d7 d8 0 figure 10. nup4201dr2 equivalent circuit during an esd condition, the esd current will be driven to ground through the tvs diode as shown below. v cc d1 d2 data line i esdpos power supply protected device figure 11. the resulting clamping voltage on the protected ic will be: vc = v f + v tvs . the clamping voltage of the tvs diode is provided in figure 4 and depends on the magnitude of the esd current. the steering diodes are fast switching devices with unique forward voltage and low capacitance characteristics.
nup4201dr2 http://onsemi.com 6 typical applications upstream usb port v bus v bus v bus v bus v bus v bus v bus v bus downstream usb port downstream usb port d ? d+ d ? d+ gnd gnd d ? d+ gnd usb controller r t r t r t r t c t c t c t c t nup2201dt1 nup4201dr2 figure 12. esd protection for usb port figure 13. protection for ethernet 10/100 (differential mode) phy ethernet (10/100) coupling transformers nup4201dr2 rj45 connector n/c n/c tx+ tx ? rx+ rx ? tx+ tx ? rx+ rx ? gnd v cc
nup4201dr2 http://onsemi.com 7 t1/e1 tranceiver rtip rring tring ttip r1 r2 r3 r4 r5 t1 t2 nup4201dr2 v cc figure 14. ti/e1 interface protection
nup4201dr2 http://onsemi.com 8 package dimensions soic ? 8 nb case 751 ? 07 issue ah seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 nup4201dr2/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loca l sales representative
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